library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity blink_led is
    Port (
        clk : in  STD_LOGIC;
        led : out STD_LOGIC
    );
end blink_led;

architecture Behavioral of blink_led is
    -- 27 MHz Oszillator
    -- Bit 23 toggelt alle ~310 ms --> LED ca. 250..310 ms on/off
    signal counter : STD_LOGIC_VECTOR(23 downto 0) := (others => '0');
begin
    process(clk)
    begin
        if rising_edge(clk) then
            counter <= counter + 1;
        end if;
    end process;

    -- Bit 23 (MSB) als Ausgabe: toggelt alle 2^23 Takte = ~310 ms bei 27 MHz
    led <= counter(23);
end Behavioral;